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논문 기본 정보

자료유형
학술저널
저자정보
Rachmad Vidya Wicaksana Putra (Institut Teknologi Bandung) Trio Adiono (Institut Teknologi Bandung)
저널정보
대한전자공학회 IEIE Transactions on Smart Processing & Computing IEIE Transactions on Smart Processing & Computing Vol.5 No.1
발행연도
2016.2
수록면
55 - 62 (8page)

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초록· 키워드

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In this paper, we propose a hybrid multi–system-on-chip (H-MSoC) architecture that provides a high-flexibility system in a rapid development time. The H-MSoC approach provides a flexible system-on-chip (SoC) architecture that is easy to configure for physical- and applicationlayer development. The physical- and application-layer aspects are dynamically designed and modified; hence, it is important to consider a design methodology that supports rapid SoC development. Physical layer development refers to intellectual property cores or other modular hardware (HW) development, while application layer development refers to user interface or application software (SW) development. H-MSoC is built from multi-SoC architectures in which each SoC is localized and specified based on its development focus, either physical or application (hybrid). Physical HW development SoC is referred to as physical-SoC (Phy-SoC) and application SW development SoC is referred to as application-SoC (App-SoC). Phy-SoC and App-SoC are connected to each other via Ethernet. Ethernet was chosen because of its flexibility, high speed, and easy configuration. For prototyping, we used a LEON3 SoC as the Phy-SoC and a ZYNQ-7000 SoC as the App-SoC. The proposed design was proven in real-time tests and achieved good performance.

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Abstract
1. Introduction
2. Related Works
3. Proposed H-MSoC System Architecture
4. Design Methodology and Prototyping
5. Evaluation of Results and Analysis
6. Conclusion
References

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