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논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.19 No.2
- 발행연도
- 2019.4
- 수록면
- 226 - 232 (7page)
- DOI
- 10.5573/JSTS.2019.19.2.226
이용수
초록· 키워드
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This paper describes a CMOS 4<SUP>th</SUP>-order delta-sigma modulator with only one amplifier for the application of bio signal processing. The proposed modulator employed only a single reconfigurable fully differential amplifier which becomes either the folded-cascode amplifier or two stage operational one, depending on the load capacitance. The modulator is implemented with 180 ㎚ CMOS standard process. The measurement results demonstrate the peak SNDR of 72.8 ㏈ and the ENOB of 11.8 bits with an input signal frequency of 250 ㎐, a sampling frequency of 256 ㎑, an input signal bandwidth of 1 ㎑, and an oversampling rate of 128. The power dissipated is measured to be 356 ㎼ (analog power of 302 ㎼ and digital power of 54 ㎼). FOM1 and FOM2 are calculated to be 49.6 pJ/step and 155 ㏈, respectively.
목차
Abstract
Ⅰ. INTRODUCTION
Ⅱ. THE PROPOSED ARCHITECTURE
Ⅲ. EXPERIMENTAL RESULTS
Ⅳ. CONCLUSION
REFERENCES
참고문헌 (11)
참고문헌 신청
S. Yang, J. Choi and K. Yoon, A Design of Reconfigurable 4th Order delta-sigma Modulator Using Two Op-amps, Journal of The Institute of Electronics and Information Engineers, vol. 52, No. 5, pp. 875-881, May. 2015.
S. Richards and G. C. Temes, Understanding Delta Sigma data converters, Wiley Interscience, 2005.
J. Choi and K. Yoon, “A CMOS Third Order ΔΣ Modulator with Inverter-Based Integrators,” IEEE System on a chip Conference, pp. 143-148, September 2017.
A. Ismail and I. Mostafa, “A Process-Tolerant, Low-Voltage, Inverter-Based OTA for Continuous- Time Delta-Sigma ADC”, IEEE Trans. on Very Large Scale Integration Systems, vol. 24, pp. 2911- 2917, 2016.
A. P. Perez, E. Bonzzoni, and F. Maloberti, “A 88- dB DR, 84-dB SNDR very low-power single opamp third-order ΣΔ modulator, ” IEEE Journal of Solid-State Circuits, Vol. 47, No. 9, pp. 2017-2118, Sep. 2012.
S. Richards and G. C. Temes, Understanding Delta Sigma data converters, Wiley Interscience, 2005.
J. Choi and K. Yoon, “A CMOS Third Order ΔΣ Modulator with Inverter-Based Integrators,” IEEE System on a chip Conference, pp. 143-148, September 2017.
A. Ismail and I. Mostafa, “A Process-Tolerant, Low-Voltage, Inverter-Based OTA for Continuous- Time Delta-Sigma ADC”, IEEE Trans. on Very Large Scale Integration Systems, vol. 24, pp. 2911- 2917, 2016.
A. P. Perez, E. Bonzzoni, and F. Maloberti, “A 88- dB DR, 84-dB SNDR very low-power single opamp third-order ΣΔ modulator, ” IEEE Journal of Solid-State Circuits, Vol. 47, No. 9, pp. 2017-2118, Sep. 2012.
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